|
Related Questions |
View Answer |
|
Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can’t resize the combinational circuit transistors)
|
View Answer
|
|
Design a divide-by-3 sequential circuit with 50% duty circle.
|
View Answer
|
|
Give a circuit to divide frequency of clock cycle by two
|
View Answer
|
|
What are set up time & hold time constraints? What do they signify? Which one is critical for estimating maximum clock frequency of a circuit?
|
View Answer
|
|
Given a circuit, draw its exact timing response.
|
View Answer
|
|
Give two ways of converting a two input NAND gate to an inverter.
|
View Answer
|
Please Note: We keep on updating better answers to this site. In case you are looking for Jobs, Pls Click Here Vyoms.com - Best Freshers & Experienced Jobs Website.
View All Hardware Design Interview Questions & Answers - Exam Mode /
Learning Mode
|