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    VLSI Interview Questions & Answers

    Below we have listed all the VLSI Interview Questions and answers. Feel free to comment on any VLSI Interview Questions or answer by the comment feature available on the page.

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    How do you size NMOS and PMOS transistors to increase the threshold voltage?
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    Draw the stick diagram of a NOR gate. Optimize it
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    For CMOS logic, give the various techniques you know to minimize power consumption
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    For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD
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    Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)
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    Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
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    Describe the various effects of scaling
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    Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
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    Give the expression for calculating Delay in CMOS circuit
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    Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
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    What is Noise Margin? Explain the procedure to determine Noise Margin
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    Draw a 6-T SRAM Cell and explain the Read and Write operations
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    What is Body Effect?
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    How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM?s performance?
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    What happens to delay if you increase load capacitance?
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    Why don?t we use just one NMOS or PMOS transistor as a transmission gate?
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    Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes (a) with increasing Vgs (b) with increasing transistor width (c) considering Channel Length Modulation
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    Explain why & how a MOSFET works
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    What?s the critical path in a SRAM?
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    Draw a CMOS Inverter. Explain its transfer characteristics
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