RISC-Means Reduced Instruction Set Computer.a Risc system has reduced number of instructions and more importantly it is load store architecture were pipelining can be implemented easily.Eg.ATMEL AVR
CISC-Means Complex instruction set architecure.A CISC system has complex instructions such as direct addition between data in two memory locations.Eg.8085
Submitted by H.Ranga samy (email@example.com)
Features of RISC: Uniform instruction format, using a single word with the opcode in the same bit positions in every instruction, demanding less decoding; Identical general purpose registers, allowing any register to be used in any context, simplifying compiler design (although normally there are separate floating point registers); Simple addressing modes. Complex addressing performed via sequences of arithmetic and/or load-store operations; Few data types in hardware, some CISCs have byte string instructions, or support complex numbers; this is so far unlikely to be found on a RISC.
Features of CISC: * complex instruction. * more addressing mode. * Highly pipelined. vice-versa of RISC.
RISC CISC Used by Apple Used by Intel and AMD processors Requires less registers therefore it is easier to design Slower than RISC chips when performing instructions Faster that CISC More expensive to make compared to RISC Reduced Instruction Set Computer Complex Instruction Set Architecture Pipelining can be implemented easily Pipelining implementation is not easy Direct addition is not possible Direct addition between data in two memory locations. Ex.8085 Fewer, simpler and faster instructions Large amount of different and complex instructions RISC architecture is not widely used Atleast 75% of the processor use CISC architecture RISC chips require fewer transistors and cheaper to produce. Finally, it's easier to write powerful optimized compilers. In common CISC chips are relatively slow (compared to RISC chips) per instruction, but use little (less than RISC) instructions. RISC puts a greater burden on the software. Software developers need to write more lines for the same tasks. In CISC, software developers no need to write more lines for the same tasks Mainly used for real time applications Mainly used in normal PC?s, Workstations and servers Large number of registers, most of which can be used as general purpose registers CISC processors cannot have a large number of registers. RISC processor has a number of hardwired instructions. CISC processor executes microcode instructions.
risc- risc is reduced instruction set computer .risc is cheaper than cisc because cisc consist of complex instructions,cisc stands for complex instruction set computer.risc reduces the instructions in the computer so coputer takes the speed as fast than cisc,cisc consist instruction more than risc.risc is efficient than cisc.risc& cisk are applicable for all microprocessors
1.Emphasis on hardware. Emphasis on Software. 2.Includes multi-clock. Single clock. 3.Complex instructions. Reduced instructions only. 4.Memory to memory load & store. Register to register load & store. 5.Incorporated in instructions. Are independent instructions. 6.Small Code Sizes. Large Code Sizes. 7.High Cycles per second. Low cycles per second. 8.Transistors used for storing complex instructions. Spends more transistors on memory registers.
RISC: REDUCED INSTRUCTION SET COMPUTER The concept of RISC architecture involves an attempt to reduce execution time bye simplifying the instruction set of the computer . the major characteristics of a RISC processor are: 1 relatively few instructions 2 relatively few addressing modes 3 memory access limited to load and store instructions 4 all operations done within the registers of the CPU 5 fixed length, easily decoded instruction format 6 single-cycle instruction execution. 7 hardwired rather than microprogrammed control
CISC :COMPLEX INSTRUCTION SET COMPUTER A computer with a large number of instruction is classified as a complex instruction set computer,abbreviated CISC. Before the RISC philosophy became prominent, many computer architects tried to bridge the so called semantic gap, i.e. to design instruction sets that directly supported high-level programming constructs such as procedure calls, loop control, and complex addressing modes, allowing data structure and array accesses to be combined into single instructions. Instructions are also typically highly encoded in order to further enhance the code density